OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization. The flow performs full ASIC implementation steps from RTL all the way down to GDSII - this capability will be released in the coming weeks with completed SoC design examples that have been sent to SkyWater for fabricaiton.

https://github.com/efabless/openlane

#GDSII #PDK #RTL #OpenROAD #Yosys #Magic #Netgen #SkyWater

FPG𝔸SIC

OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization. The flow performs full ASIC implementation steps from RTL all the way down to GDSII - this capability will be released in the coming weeks with completed SoC design examples that have been sent to SkyWater for fabricaiton.

https://github.com/efabless/openlane

#GDSII #PDK #RTL #OpenROAD #Yosys #Magic #Netgen #SkyWater

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hottg.com/fpgasic/102

3.04K viewsJul 27, 2020 at 15:04